a
CMOS Low Voltage 4 ⍀, 4-Channel Multiplexer ADG704
FEATURES +1.8 V to +5.5 V Single Supply 2.5 ⍀ (Typ) On Resistance Low On-Resistance Flatness –3 dB Bandwidth >200 MHz Rail-to-Rail Operation 10-Lead SOIC Package Fast Switching Times tON 20 ns tOFF 13 ns Typical Power Consumption (<0.01 W) TTL/CMOS Compatible
FUNCTIONAL BLOCK DIAGRAM ADG704 S1 S2 D S3 S4 1 OF 4 DECODER
APPLICATIONS Battery Powered Systems Communication Systems Sample-and-Hold Systems Audio Signal Routing Data Acquisition System Video Switching
A0
A1
EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG704 is a CMOS analog multiplexer, comprising four single channels. This multiplexer is designed on an advanced submicron process that provides low power dissipation yet gives high switching speed, low on resistance, low leakage currents and high bandwidths.
1. +1.8 V to +5.5 V Single Supply Operation. The ADG704 offers high performance and is fully specified and guaranteed with +3 V and +5 V supply rails.
The on resistance profile is very flat over the full analog signal range. This ensures excellent linearity and low distortion when switching audio signals. Fast switching speed also makes the part suitable for video signal switching. The ADG704 can operate from a single supply range of +1.8 V to +5.5 V, making it ideal for use in battery powered instruments and with the new generation of DACs and ADCs from Analog Devices. The ADG704 switches one of four inputs to a common output, D, as determined by the 3-bit binary address lines, A0, A1 and EN. A Logic “0” on the EN pin disables the device.
2. Very Low RON (4.5 Ω Max at 5 V, 8 Ω Max at 3 V). At supply voltage of +1.8 V, RON is typically 35 Ω over the temperature range. 3. Low On-Resistance Flatness. 4. –3 dB Bandwidth Greater than 200 MHz. 5. Low Power Dissipation. CMOS construction ensures low power dissipation. 6. Fast tON/tOFF. 7. Break-Before-Make Switching Action. 8. 10-Lead µSOIC Package.
Each switch of the ADG704 conducts equally well in both directions when ON. The ADG704 exhibits break-before-make switching action. The ADG704 is available in 10-lead µSOIC package.
REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999
ADG704* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017
COMPARABLE PARTS
REFERENCE MATERIALS
View a parametric search of comparable parts.
Product Selection Guide
EVALUATION KITS
Technical Articles
• Evaluation Board for 10-Lead MSOP Devices in the Switches and Multiplexers Portfolio
• CMOS Switches Offer High Performance in Low Power, Wideband Applications
• Switches and Multiplexers Product Selection Guide
DOCUMENTATION Application Notes • AN-1024: How to Calculate the Settling Time and Sampling Rate of a Multiplexer Data Sheet • ADG704: CMOS Low Voltage 4 Ohm, 4-Channel Multiplexer Data Sheet User Guides • UG-1037: Evaluation Board for 10-Lead MSOP Devices in the Switches and Multiplexers Portfolio
REFERENCE DESIGNS • CN0363 • CN0364
• Data-acquisition system uses fault protection • Enhanced Multiplexing for MEMS Optical Cross Connects • Temperature monitor measures three thermal zones
DESIGN RESOURCES • ADG704 Material Declaration • PCN-PDN Information • Quality And Reliability • Symbols and Footprints
DISCUSSIONS View all ADG704 EngineerZone Discussions.
SAMPLE AND BUY Visit the product page to see pricing options.
TECHNICAL SUPPORT Submit a technical question or find your regional support number.
DOCUMENT FEEDBACK Submit feedback for this data sheet.
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= +5 V ⴞ 10%, GND = 0 V. All Specifications –40ⴗC to +85ⴗC, unless ADG704–SPECIFICATIONS1 (Votherwise noted.) DD
Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON)
B Version –40ⴗC to +25ⴗC +85ⴗC 0 V to VDD 2.5 4
On-Resistance Match Between Channels (∆RON) On-Resistance Flatness (RFLAT(ON))
4.5 0.1 0.4
0.75
Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON)
± 0.01 ± 0.1 ± 0.01 ± 0.1 ± 0.01 ± 0.1
DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH
0.005
DYNAMIC CHARACTERISTICS2 tON
14
Test Conditions/Comments
V Ω typ Ω max
VS = 0 V to VDD, IDS = –10 mA; Test Circuit 1
Ω typ Ω max Ω typ Ω max
1.2 LEAKAGE CURRENTS Source OFF Leakage IS (OFF)
Units
VS = 0 V to VDD, IDS = –10 mA VDD = +5.5 V VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test Circuit 2 VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test Circuit 2 VS = VD = 4.5 V or 1 V; Test Circuit 3
± 0.3
nA typ nA max nA typ nA max nA typ nA max
2.4 0.8
V min V max
± 0.1
µA typ µA max
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF VS = 3 V, Test Circuit 4 RL = 300 Ω, CL = 35 pF VS = 3 V, Test Circuit 4 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 3 V, Test Circuit 5 VS = 2 V, RS = 0 Ω, CL = 1 nF; Test Circuit 6 RL = 50 Ω, CL = 5 pF, f = 10 MHz RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 Ω, CL = 5 pF, f = 10 MHz RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 8 RL = 50 Ω, CL = 5 pF; Test Circuit 9
± 0.3 ± 0.3
tOFF
6
Break-Before-Make Time Delay, tD
8
Charge Injection
3
ns typ ns max ns typ ns max ns typ ns min pC typ
Off Isolation
–60 –80
dB typ dB typ
Channel-to-Channel Crosstalk
–62 –82
dB typ dB typ
Bandwidth –3 dB CS (OFF) CD (OFF) CD, CS (ON)
200 9 37 54
MHz typ pF typ pF typ pF typ
20 13 1
POWER REQUIREMENTS IDD
VS = 0 V to VDD, IDS = –10 mA
µA typ µA max
0.001 1.0
VDD = +5.5 V Digital Inputs = 0 V or 5 V
NOTES 1 Temperature ranges are as follows: B Version: –40°C to +85°C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
–2–
REV. A
ADG704
SPECIFICATIONS1 (V
DD
= +3 V ⴞ 10%, GND = 0 V. All Specifications –40ⴗC to +85ⴗC, unless otherwise noted.)
Parameter
B Version –40ⴗC to +25ⴗC +85ⴗC
ANALOG SWITCH Analog Signal Range On-Resistance (RON)
4.5
On-Resistance Match Between Channels (∆RON)
Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON)
Test Conditions/Comments
0 V to VDD 5 8
V Ω typ Ω max
VS = 0 V to VDD, IDS = –10 mA; Test Circuit 1
0.4 2.5
Ω typ Ω max Ω typ
0.1
On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF)
Units
± 0.01 ± 0.1 ± 0.01 ± 0.1 ± 0.01 ± 0.1
DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH
0.005
DYNAMIC CHARACTERISTICS2 tON
16
VDD = +3.3 V VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = VD = 3 V or 1 V; Test Circuit 3
± 0.3 2.0 0.4
V min V max
± 0.1
µA typ µA max
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF VS = 2 V, Test Circuit 4 RL = 300 Ω, CL = 35 pF VS = 2 V, Test Circuit 4 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 2 V, Test Circuit 5 VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Test Circuit 6 RL = 50 Ω, CL = 5 pF, f = 10 MHz RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 Ω, CL = 5 pF, f = 10 MHz RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 8 RL = 50 Ω, CL = 5 pF; Test Circuit 9
± 0.3 ± 0.3
tOFF
8
Break-Before-Make Time Delay, tD
9
Charge Injection
3
ns typ ns max ns typ ns max ns typ ns min pC typ
Off Isolation
–60 –80
dB typ dB typ
Channel-to-Channel Crosstalk
–62 –82
dB typ dB typ
Bandwidth –3 dB CS (OFF) CD (OFF) CD, CS (ON)
200 9 37 54
MHz typ pF typ pF typ pF typ
16 1
POWER REQUIREMENTS µA typ µA max
0.001 1.0
NOTES 1 Temperature ranges are as follows: B Version: –40°C to +85°C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
REV. A
VS = 0 V to VDD, IDS = –10 mA
nA typ nA max nA typ nA max nA typ nA max
24
IDD
VS = 0 V to VDD, IDS = –10 mA
–3–
VDD = +3.3 V Digital Inputs = 0 V or 3 V
ADG704 ABSOLUTE MAXIMUM RATINGS 1
TERMINOLOGY
(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V Analog, Digital Inputs2 . . . . . . . . . . . –0.3 V to VDD +0.3 V or 30 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle Max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C µSOIC Package, Power Dissipation . . . . . . . . . . . . . . . 315 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
VDD GND S D A0, A1 EN RON ∆RON RFLAT(ON)
ID (OFF) IS (OFF) ID, IS (ON) VD (VS) CS (OFF) CD (OFF) CD, CS (ON) tON tOFF
ORDERING GUIDE
tD
Model
Temperature Range
Brand1
Package Option2
ADG704BRM
–40°C to +85°C
S9B
RM-10
Crosstalk
NOTES 1 Brand = Due to small package size, these three characters represent the part number. 2 RM = µSOIC.
Off Isolation Charge Injection
PIN CONFIGURATION (10-Lead SOIC)
A0 1 S1 2
ADG704
10
A1
9
S2
Bandwidth On Response On Loss
GND 3
TOP VIEW 8 D (Not to Scale) 7 S4 S3 4
EN 5
6
Most positive power supply potential. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control inputs. Logic control input. Ohmic resistance between D and S. On resistance match between any two channels i.e., RONmax–RONmin. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. Drain leakage current with the switch “OFF.” Source leakage current with the switch “OFF.” Channel leakage current with the switch “ON.” Analog voltage on terminals D, S. “OFF” switch source capacitance. “OFF” switch drain capacitance. “ON” switch capacitance. Delay between applying the digital control input and the output switching on. See Test Circuit 4. Delay between applying the digital control input and the output switching off. “OFF” time or “ON” time measured between the 90% points of both switches, when switching from one address state to another. See Test Circuit 5. A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an “OFF” switch. A measure of the glitch impulse transferred from the digital input to the analog output during switching. The frequency at which the output is attenuated by –3 dBs. The frequency response of the “ON” switch. The voltage drop across the “ON” switch, seen on the On Response vs. Frequency plot as how many dBs the signal is away from 0 dB at very low frequencies.
VDD
Table I. Truth Table
A1
A0
EN
ON Switch
X 0 0 1 1
X 0 1 0 1
0 1 1 1 1
NONE 1 2 3 4
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG704 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING! ESD SENSITIVE DEVICE
REV. A
Typical Performance Characteristics–ADG704 6.0
10m
TA = +258C
5.5
VDD = +5V 1m
5.0 4.5
A0 TOGGLED
VDD = +2.7V
100m
ISUPPLY – A
RON – V
4.0 3.5 VDD = +3.0V
3.0
VDD = +4.5V
2.5
10m
EN TOGGLED
1m
2.0 100n
VDD = +5.0V
1.5 1.0
10n
0.5 0 0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
1n 100
5.0
10k 100k FREQUENCY – Hz
1M
10M
Figure 4. Supply Current vs. Input Switching Frequency
Figure 1. On Resistance as a Function of VD (VS) Single Supplies
–30
6.0
VDD = +5V, +3V
VDD = +3.0V
5.5
–40
5.0
–50
4.5
OFF ISOLATION – dB
+858C
4.0
RON – V
1k
+258C
3.5 3.0
–408C
2.5 2.0
–60 –70 –80 –90 –100
1.5
–110 1.0
–120
0.5
–130 10k
0 0
0.5 1.0 1.5 2.0 2.5 VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
3.0
Figure 2. On Resistance as a Function of VD (VS) for Different Temperatures; VDD = 3 V
100M
–30 VDD = +5V, +3V
VDD = +5.0V
5.5
–40
5.0
–50 CROSSTALK – dB
4.5 4.0 RON – V
1M 10M FREQUENCY – Hz
Figure 5. Off Isolation vs. Frequency
6.0
3.5 3.0 2.5
+858C
2.0
+258C
–70 –80 –90
–110
–408C
1.0
–60
–100
1.5
–120
0.5
–130 10k
0 0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VD OR VS – DRAIN OR SOURCE VOLTAGE – Volts
5.0
100k
1M 10M FREQUENCY – Hz
Figure 6. Crosstalk vs. Frequency
Figure 3. On Resistance as a Function of VD (VS) for Different Temperatures; VDD = 5 V
REV. A
100k
–5–
100M
ADG704 0
25 TA = +258C VDD = +5V
VDD = +5V
20
VDD = +3V 10 QINJ – pC
ON RESPONSE – dB
15 –2
5 0
–4
–5 –10 –6 10k
100k
1M 10M FREQUENCY – Hz
–15 0.0
100M
0.5
1.0
1.5 2.0 2.5 3.0 3.5 SOURCE VOLTAGE – Volts
4.0
4.5
5.0
Figure 8. Charge Injection vs. Source Voltage
Figure 7. On Response vs. Frequency APPLICATIONS VDD V+ CH1
. . .
S1 75V
. . .
D A=2
S4
CH4
75V
250V
75V
VOUT RL 75V
ADG704 250V A0 A1 EN
Figure 9. 4-Channel Video Multiplexing
–6–
REV. A
ADG704 Test Circuits IDS
V1 S
VS
IS (OFF)
D
A
RON = V1/IDS
ID (OFF) S
D
VS
Test Circuit 1. On Resistance 0.1mF
ID (ON) S
A VD
VS
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VDD VIN
D
50%
50%
VOUT RL 300V
VS IN
CL 35pF
90%
90%
VOUT
tOFF
tON
GND
Test Circuit 4. Switching Times
0.1mF
VDD
VDD VIN
S1
VS1
.. .
.. .
50%
VOUT
S4
VS4
50%
0V
D RL 300V
CL 35pF
VOUT
50%
50%
0V
tD
VIN
tD
GND
Test Circuit 5. Break-Before-Make Time Delay, tD
VDD SW ON
VDD RS
S
VOUT CL 1nF
DECODER
VOUT
DVOUT QINJ = CL 3 DVOUT
GND EN A0 A1
Test Circuit 6. Charge Injection
REV. A
SW OFF
VIN
D
VS
–7–
A VD
VDD
S
D
ADG704 VDD
0.1mF
VDD
S1
.. . S4
.. .. .
D
S1
VOUT
VOUT
D S2
RL 50V
VIN
RL 50V
IN
VS
GND
GND
CHANNEL-TO-CHANNEL CROSSTALK = 20 3 LOG |VS/VOUT|
Test Circuit 8. Channel-to-Channel Crosstalk
Test Circuit 7. Off Isolation 0.1mF
VDD
VDD D
S
VOUT RL 50V
IN
VS
GND
Test Circuit 9. Bandwidth
OUTLINE DIMENSIONS Dimensions shown in inches and (mm).
10-Lead SOIC (RM-10) 0.122 (3.10) 0.114 (2.90)
10
6
0.199 (5.05) 0.187 (4.75)
0.122 (3.10) 0.114 (2.90) 1
5
PIN 1 0.0197 (0.50) BSC
0.037 (0.94) 0.031 (0.78)
0.120 (3.05) 0.112 (2.85)
PRINTED IN U.S.A.
VS
VDD
C3383a–0–6/99
0.1mF
0.120 (3.05) 0.112 (2.85) 0.043 (1.10) MAX
68 0.006 (0.15) 0.012 (0.30) SEATING 08 PLANE 0.009 (0.23) 0.002 (0.05) 0.006 (0.15) 0.005 (0.13)
–8–
0.028 (0.70) 0.016 (0.40)
REV. A
