15MH211J
L 3
Digital Systems and Microprocessors
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P 2
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Co-requisite: Nil Prerequisite: 15EC101 Data Book / Approved operational code sheets Codes/Standards Course Category P Professional Core Electronics Engineering Course designed by Department of Mechatronics Engineering Approval 32nd Academic Council Meeting held on 23.07.2016. To impart the knowledge of the digital systems, processor architecture, programming, interfacing and Purpose rudiments of system design with microprocessors. Instructional Objectives Student Outcomes At the end of the course, student will be able to 1. Design the combinational and sequential circuits. a b 2. Enlighten the architecture of microprocessors. a 3. Develop the assembly language programs. a b 4. Design the microprocessor systems with its peripherals. a b Implement the concepts to improve the performance of 5. a b e microprocessor. Session
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24.
Description of Topics Unit I: Minimization Techniques and Combinational Circuits Boolean expression and minimization of Boolean expressions. Minterm, maxterm, Sum of Products (SOP) and Product of Sums (POS). Karnaugh map minimization for Boolean Expression. Karnaugh map minimization with don’t care conditions. Combinational Circuits: Design of half adder, full adder, half subtractor and full subtractor. Logical diagram of parallel binary adder and parallel binary subtractor. Design and implementation of multiplexer and demultiplexer. Design and implementation of decoder and encoder. Design of 4-bit binary to gray code converters. Design of 2-bit magnitude comparator. Unit II: Sequential Circuits Latches, flip-flops, characteristic table and equations for SR and JK flip-flops. Characteristic table and equations for D, T and master slave flip-flops. Triggering of digital circuits and realization of one flip-flop using other flip-flop. Logical diagram of asynchronous ripple or serial counter. Logical diagram of asynchronous Up / Down counter. Design and implementation of 3 bit synchronous counter. Shift registers: Concept, types. Unit III: Introduction to 8085 Microprocessor Evolution of microprocessors and computers. Introduction to architecture of computer and microprocessor Intel 8085. Functions of various blocks and signals of microprocessor Intel 8085. Addressing modes of microprocessor Intel 8085. Instruction set of microprocessor Intel 8085. Simple assembly language programs using the instructions of microprocessor Intel 8085. Basic timing diagrams of Intel 8085.
Mechatronics Engineering 2015-16
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Session 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 41. 42.
Description of Topics Unit IV: Introduction to 8086 Microprocessor Architecture of microprocessor 8086. Functional blocks and signals of microprocessor 8086. Minimum and maximum mode of the microprocessor 8086. Addressing modes of microprocessor 8086. Instruction set of microprocessor 8086. Assembler directives and interrupts of microprocessor 8086. Assembly language programs of microprocessor 8086. Unit V: Peripheral Interfacing Data transfer schemes, interrupts, software interrupt. Functional blocks and description of programmable interrupt controller 8259. Functional blocks and description of programmable peripheral interface 8255. Functional blocks and description of programmable interval timer 8253. Functional blocks and description of programmable communication interface 8251 USART. Functional blocks and description of DMA controller 8257. Applications: stepper motor control using microprocessor 8085. A/D and D/A conversion using microprocessor 8085. Assessment Cycle test – I Cycle test – II Surprise test /Assignment and Quiz Total contact hours
Contact hours 8 1 1 1 1 2 1 1 8 1
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Description of Experiments
1.
Implementation of gate circuits and its truth table verification. Realization of logic circuits of i) Full Adder ii) Multiplexer and Demultiplexer iii) Encoder and Decoder. Study of flip-flops: SR, JK, T and D flip-flops. Design of synchronous counter using JK flip flop. Design of shift register using D flip flop. Study of various microprocessor architectures and selection chart Arithmetic operations on 8-bit and 16-bit using 8085 instructions. Code conversion using 8085 instructions. Sorting (Ascending/Descending) program using 8086 instructions. Interfacing of stepper motor using 8085. Traffic light controller using 8085. Generating waveforms using 8085 (Square, triangle and saw tooth). Extra practice session. Extra practice session. Model Examination Total contact hours
2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15.
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Learning Resources Sl. No. Text Books M.Morris Mano, Michael D Ciletti,“Digital Design”, 5th edition Pearson Education (Singapore) Pvt. 1. Ltd., 2014. Ramesh S. Gaonkar, "Microprocessor Architecture. Programming and Applications with the 8085”, 5th 2. edition, Penram International Publishing (India) Private Limited. 2005. DoughlasV.Hall, “Microprocessors and Interfacing, Programming and Hardware”, Tata McGraw Hill, 3. 2012.
Mechatronics Engineering 2015-16
4. 5. 6. 7. 8.
Reference Books/Other Reading Materials John F.Wakerly, “Digital Design”, 4th edition, Pearson/Prentice Hall of India, 2008. Charles H.Roth, “Fundamentals of Logic Design”, 6th edition, Thomson Learning, 2013. Yu-Cheng Liu, Glenn A. Gibson, “Microcomputer Systems: The 8086 / 8088 Family - Architecture, Programming and Design”, 2nd edition, Prentice Hall of India, 2007. Mohammed Rafiquzzaman, “Microprocessors and Microcomputer Based System Design”, Universal Book Stall, New Delhi, 1990. Digital Systems and Microprocessors Laboratory Manual.
In-semester
In-semester
Course nature Theory + Practical Assessment Method – Theory Component (Weightage 50%) Cycle test I Cycle test II Cycle Test III Surprise Test Quiz Assessment tool Weightage 10% 15% 15% 5% 5% End semester examination weightage: Assessment Method – Practical Component (Weightage 50%) Assessment tool Experiments Record MCQ/Quiz/VivaVoce Model examination Weightage 40% 5% 5% 10% End semester examination weightage:
Mechatronics Engineering 2015-16
Total 50% 50% Total 60% 40%
