LTC1391 8-Channel Analog Multiplexer with Cascadable Serial Interface
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FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
DESCRIPTIO
The LTC ® 1391 is a high performance CMOS 8-to-1 analog multiplexer. It features a serial digital interface that allows several LTC1391s to be daisy-chained together, increasing the number of MUX channels available using a single digital port.
Low RON: 45Ω Single 2.7V to ±5V Supply Operation Low Charge Injection Serial Digital Interface Analog Inputs May Extend to Supply Rails Low Leakage: ±5nA Max Guaranteed Break-Before-Make TTL/CMOS Compatible for All Digital Inputs Cascadable to Allow Additional Channels Can Be Used as a Demultiplexer
The LTC1391 features a typical RON of 45Ω, a typical switch leakage of 50pA and guaranteed break-beforemake operation. Charge injection is ±10pC maximum. All digital inputs are TTL and CMOS compatible when operated from single or dual supplies. The inputs can withstand 100mA fault current.
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The LTC1391 is available in 16-pin PDIP, SSOP and narrow SO packages. For applications requiring 2-way serial data transmission, see the LTC1390 data sheet.
Data Acquisition Systems Communication Systems Signal Multiplexing/Demultiplexing
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
3V, 8-Channel 12-Bit ADC
On-Resistance vs Analog Input Voltage
3V
300
2 3 ANALOG INPUTS
4 5 6 7 8
S0
V+
S1
D
S2
V–
S3 S4
DOUT LTC1391
DIN
S5
CS
S6
CLK
S7
GND
SERIAL INTERFACE TO MUX AND ADC
16 15 14 13
OPTIONAL A/D INPUT FILTER
1 2
VREF +IN
VCC
CLK LTC1285 3 –IN DOUT 4 GND CS/SHDN
1µF
8
TA = 25°C 250
7 ON-RESISTANCE (Ω)
1
0.1µF
6 5
12 11 10 9
V + = 2.7V V – = 0V
200 150 100 50
V + = 5V V – = –5V
0 –5 –4 –3 –2 –1 0 1 2 3 ANALOG INPUT VOLTAGE (V)
DATA IN CLK CS DATA OUT
4
5
1391 TA02
1391 TA01
sn1391 1391fas
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LTC1391
W W
W
(Note 1)
AXI U
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ABSOLUTE
RATI GS
U U W PACKAGE/ORDER I FOR ATIO
Total Supply Voltage (V + to V –) .............................. 15V Input Voltage Analog Inputs/Outputs ..... (V – – 0.3V) to (V + + 0.3V) Digital Inputs .........................................– 0.3V to 15V Digital Outputs ..........................– 0.3V to (V + + 0.3V) Power Dissipation .............................................. 500mW Operating Temperature Range LTC1391C ............................................... 0°C to 70°C LTC1391I ........................................... – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW S0 1
16 V +
S1 2
15 D
S2 3
14 V –
S3 4
13 DOUT
S4 5
12 DIN
S5 6
11 CS
S6 7
10 CLK
S7 8
9
ORDER PART NUMBER LTC1391CGN LTC1391CN LTC1391CS LTC1391IGN LTC1391IN LTC1391IS
GND
GN PACKAGE N PACKAGE 16-LEAD PLASTIC SSOP 16-LEAD PDIP S PACKAGE 16-LEAD PLASTIC SO
GN PART MARKING 1391 1391I
TJMAX = 125°C, θJA = 110°C/ W (GN) TJMAX = 125°C, θJA = 70°C/ W (N) TJMAX = 125°C, θJA = 100°C/ W (S)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 5V, V – = – 5V, GND = 0V, unless otherwise specified. SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Switch VANALOG Analog Signal Range
(Note 2)
RON
VS = ±3.5V, ID = 1mA
On-Resistance
●
–5
TMIN = 0°C (LTC1391C) TMIN = –40°C (LTC1391I) 25°C
45
TMAX = 70°C (LTC1391C) TMAX = 85°C (LTC1391I)
IS(OFF) ID(OFF) ID(ON)
5
V
75
Ω
75
Ω
120
Ω
∆RON vs VS
20
%
∆RON vs Temperature
0.5
%/°C
Off Input Leakage
VS = 4V, VD = – 4V, VS = – 4V, VD = 4V Channel Off
●
VS = 4V, VD = – 4V, VS = – 4V, VD = 4V Channel Off
●
VS = VD = ±4V Channel On
●
High Level Input Voltage
V + = 5.25V
●
Low Level Input Voltage
V+
Off Output Leakage On Channel Leakage
±0.05
±5 ±20
nA nA
±0.05
±5 ±20
nA nA
±0.05
±5 ±20
nA nA
Digital VINH VINL
V
●
0.8
V
IINL, IINH Input Current
VIN = 5V, 0V
●
±5
µA
VOH
V + = 4.75V, IO = – 10µA V + = 4.75V, IO = – 360µA
●
V + = 4.75V, IO = 1.6mA
●
VOL
High Level Output Voltage Low Level Output Voltage
= 4.75V
2.4
2.4
4.74 4.50 0.5
V V 0.8
V
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LTC1391 ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 5V, V – = – 5V, GND = 0V, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Dynamic fCLK
Clock Frequency
(Note 2)
5
tON
Enable Turn-On Time
VS = 2.5V, RL = 1k, CL = 35pF
260
400
ns
tOFF
Enable Turn-Off Time
VS = 2.5V, RL = 1k, CL = 35pF
100
200
ns
tOPEN
Break-Before-Make Interval
OIRR
Off Isolation
VS = 2VP–P, RL = 1k, f = 100kHz
70
QINJ
Charge Injection
RS = 0, CL = 1000pF, VS = 1V (Note 2)
±2
CS(OFF)
Input Off Capacitance
5
pF
CD(0FF)
Output Off Capacitance
10
pF
35
MHz
155
ns dB ±10
pC
Supply I+
Positive Supply Current
All Logic Inputs Tied Together, VIN = 0V or 5V
●
15
40
µA
I–
Negative Supply Current
All Logic Inputs Tied Together, VIN = 0V or 5V
●
– 15
– 40
µA
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 2.7V, V – = GND = 0V, unless otherwise specified. SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.7
V
300
Ω
300
Ω
350
Ω
Switch VANALOG Analog Signal Range
(Note 2)
RON
VS = 1.2V, IO = 1mA
On-Resistance
●
0
TMIN = 0°C (LTC1391C) TMIN = –40°C (LTC1391I) 25°C
250
TMAX = 70°C (LTC1391C) TMAX = 85°C (LTC1391I) ∆RON vs VS
20
∆RON vs Temperature IS(OFF)
0.5 VS = 2.5V, VD = 0.5V; VS = 0.5V, VD = 2.5V (Note 3) Channel Off
●
VS = 2.5V, VD = 0.5V; VS = 0.5V, VD = 2.5V (Note 3) Channel Off
●
VS = VD = 0.5V, 2.5V (Note 3) Channel On
●
High Level Input Voltage
V + = 3.0V
●
Low Level Input Voltage
V+
= 2.4V
●
IINL, IINH Input Current
VIN = 2.7V, 0V
●
VOH
V + = 2.7V, IO = – 20µA V + = 2.7V, IO = – 400µA
●
V + = 2.7V, IO = 20µA V + = 2.7V, IO = 400µA
●
ID(OFF) ID(ON)
Off Input Leakage Off Output Leakage On Channel Leakage
% %/°C
±0.05
±5 ±20
nA nA
±0.05
±5 ±20
nA nA
±0.05
±5 ±20
nA nA
Digital VINH VINL
VOL
High Level Output Voltage Low Level Output Voltage
2.0
2.0
V 0.8
V
±5
µA
2.68 2.30 0.01 0.20
V V 0.8
V V
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LTC1391 ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 2.7V, V – = GND = 0V, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Dynamic fCLK
Clock Frequency
(Note 2)
5
tON
Enable Turn-On Time
VS = 1.5V, RL = 1k, CL = 35pF (Note 4)
490
800
ns
tOFF
Enable Turn-Off Time
VS = 1.5V, RL = 1k, CL = 35pF (Note 4)
190
400
ns
tOPEN
Break-Before-Make Interval
(Note 4)
QIRR
Off Isolation
VS = 2VP–P, RL = 1k, f = 100kHz
70
QINJ
Charge Injection
RS = 0, CL = 1000pF, VS = 1V (Note 2)
±1
CS(OFF)
Input Off Capacitance
5
pF
CD(OFF)
Output Off Capacitance
10
pF
125
MHz
290
ns dB ±5
pC
Supply I+
Positive Supply Current
All Logic Inputs Tied Together, VIN = 0V or 2.7V
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Guaranteed by Design.
0.2
●
µA
2
Note 3: Leakage current with a single 2.7V supply is guaranteed by correlation with the ±5V leakage current specifications. Note 4: Timing specifications with a single 2.7V supply are guaranteed by correlation with the ±5V timing specifications.
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TYPICAL PERFOR A CE CHARACTERISTICS Driver Output Low Voltage vs Output Current
On-Resistance vs Temperature
0.65
1.2
V VS = 1.2V
1.0 OUTPUT VOLTAGE (V)
250 200 150 100
V + = 5V V – = –5V VS = 0V
50
TA = 25°C
1.1
V + = 2.7V – = 0V
0.60
0.9 0.8 0.7 0.6 0.5 0.4
V + = 5V V – = –5V
0.3 0.2
–20
20 40 60 0 TEMPERATURE (°C)
80 1391 G01
0
0.50 0.45 0.40 0.35 0.30
V + = 2.7V V – = 0V IO = 400µA
0.25 0.20 0.15
0.1
0 –40
V + = 5V V – = –5V IO = 1.8mA
0.55
V + = 2.7V V – = 0V
OUTPUT VOLTAGE (V)
300
ON-RESISTANCE (Ω)
Driver Output Low Voltage vs Temperature
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 OUTPUT CURRENT (mA) 1391 G02
0.10 –40
–20
40 60 0 20 TEMPERATURE (°C)
80 1391 G03
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LTC1391 U W
TYPICAL PERFOR A CE CHARACTERISTICS Driver Output High Voltage vs Temperature
Driver Output High Voltage vs Output Current 5.0
0
4.0
–1.0 –1.5
V + = 5V V – = –5V
–2.0 –2.5 –3.0
3.5 3.0 2.5 V + = 2.7V V – = 0V IO = 400µA
2.0 1.5 1.0
–3.5 –4.0 2.0
V + = 5V V – = –5V IO = 1.6mA
4.5
V + = 2.7V V – = 0V OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
–0.5
0.5
TA =25°C 2.5
3.0 3.5 4.0 OUTPUT VOLTAGE (V)
4.5
5.0
0 –40
–20
40 60 0 20 TEMPERATURE (°C)
80 1391 G05
1391 G04
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PIN FUNCTIONS S0, S1, S2, S3, S4, S5, S6, S7 (Pins 1, 2, 3, 4, 5, 6, 7, 8): Analog Multiplexer Inputs.
DIN (Pin 12): Digital Input (TTL/CMOS Compatible). Input for the channel selection bits.
GND (Pin 9): Digital Ground. Connect to system ground.
DOUT (Pin 13): Digital Output (TTL/CMOS Compatible). Output from the internal shift register.
CLK (Pin 10): System Clock (TTL/CMOS Compatible). The clock synchronizes the channel selection bits and the serial data transfer from DIN to DOUT. CS (Pin 11): Channel Select Input (TTL/CMOS Compatible). A logic high on this input enables the LTC1391 to read in the channel selection bits and allows digital data transfer from DIN to DOUT. A logic low on this input puts DOUT into three-state and enables the selected channel for analog signal transmission.
V – (Pin 14): Negative Supply. For ±5V dual supply applications, |V – | should not exceed |V +|by more than 20% for proper channel selection. D (Pin 15): Analog Multiplexer Output. V + (Pin 16): Positive Supply.
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LTC1391
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APPLICATIONS INFORMATION Multiplexer Operation Figure 1 shows the block diagram of the components within the LTC1391 required for MUX operation. The LTC1391 uses DIN to select the active channel and the chip select input, CS, to switch on the selected channel as shown in Figure 2. When CS is high, the input data on the DIN pin is latched into the 4-bit shift register on the rising clock edge. The input data consists of the “EN” bit and a string of three bits for channel selection. If “EN” bit is logic high as illustrated in the first input data sequence, it enables the selected channel. After the clocking in of the last channel selection bit B0, the CS pin must be pulled low before the next rising clock edge to ensure correct operation. Once CS is pulled low, the previously selected channel is switched off to ensure a break-before-make interval. After a delay of tON, the selected channel is switched on allowing signal transmission. The selected channel remains on until the next falling edge of CS. After a delay of tOFF, the LTC1391 terminates the analog signal transmission and allows the CLK CONTROL LOGIC
DIN
4-BIT SHIFT REGISTER
CS
selection of next channel. If the “EN” bit is logic low, as illustrated in the second data sequence, it disables all channels and there will be no analog signal transmission. Table 1 shows the various bit combinations for channel selection. Table 1. Logic Table for Channel Selection ACTIVE CHANNEL
EN
B2
B1
BO
All Off
0
X
X
X
S0
1
0
0
0
S1
1
0
0
1
S2
1
0
1
0
S3
1
0
1
1
S4
1
1
0
0
S5
1
1
0
1
S6
1
1
1
0
S7
1
1
1
1
Digital Data Transfer Operation The block diagram of Figure 3 shows the components within the LTC1391 required for serial data transfer. When CS is held high, data is fed into the 4-bit shift register and then shifted to DOUT. Data appears at DOUT after the fourth rising edge of the clock as shown in Figure 4. The last four CLK
ANALOG OUTPUT (D)
MUX BLOCK
ANALOG INPUTS (S0 TO S7)
CONTROL LOGIC
DIN
4-BIT SHIFT REGISTER
CS
DOUT 1391 F03
1391 • F01
Figure 1. Simplified Block Diagram of the MUX Operation
Figure 3. Simplified Block Diagram of the Digital Data Transfer Operation
CLK
CS
DIN
EN HIGH
B2
B1
EN LO
B0
B2
B1
B0
ANY ANALOG INPUT
D t ON
t OFF
1391 • F02
Figure 2. Multiplexer Operation sn1391 1391fas
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LTC1391
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APPLICATIONS INFORMATION bits clocked into the LTC1391 shift register before CS is taken low select the MUX channel that is turned on. This allows a series of devices, with the DOUT of one device connected to the DIN of the next device, to be programmed with a single data stream. CLK
DIN
1
D1
2
D2
3
D3
4
D4
DOUT
D5
D1
D2
D3
D4
D5
To ensure that only one channel is switched on at any one time, two sets of channel selection bits are needed for DATA as shown in Figure 6. The first data sequence is used to switch off one MUX and the second data sequence is used to select one channel from the other MUX or vice versa. In other words, if bit “ENA” is high and bit “ENB” is low, one channel of MUX A is switched on and all channels of MUX B are switched off. If bit “ENA” is low and bit “ENB” is high, all channels at MUX A are switched off and one channel of MUX B is switched on. Care should be taken to ensure that only one LTC1391 is enabled at any one time to prevent two channels from being enabled simultaneously.
1391 • F04
Figure 4. Digital Data Transfer Operation
CLK
1
2
3
4
5
6
7
8
Multiplexer Expansion Several LTC1391s can be daisy-chained to expand the number of multiplexer inputs. No additional interface ports are required for the expansion. Figure 5 shows two LTC1391s connected at their analog outputs to form a 16-to-1 multiplexer at the input to an LTC1400 A/D converter.
3 ANALOG INPUTS
4 5 6 7 8
1 2 3 ANALOG INPUTS
4 5 6 7 8
V+
S1
D
S2
V–
S3 S4 S5 S6 S7
S1
D
S2
V–
S5 S6 S7
A1
A0
ENB
B2
B1
B0 1391 • F06
Figure 6. Data Sequence for MUX Expansion 5V
+
OPTIONAL A/D INPUT FILTER
1 2
15 14
DOUT LTC1391 12 DIN A 11 CS 10 CLK 9 GND
V+
S4
16
13
S0
S3
A2
+ 10µF
VCC
VSS
AIN
CONV LTC1400 3 VREF CLK 0.1µF 4 GND DOUT
0.1µF
10µF
10µF
– 5V 0.1µF
8 7 6 5
+
2
ENA
0.1µF
0.1µF
S0
DIN
–5V
5V
1
CS
DATA OUT
16 15 14
13 DOUT LTC1391 12 DIN B 11 CS 10 CLK 9 GND
DATA IN CS CLK
1391 • F05
Figure 5. Daisy-Chaining Two LTC1391s for Expansion sn1391 1391fas
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LTC1391
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TYPICAL APPLICATIONS Daisy-Chaining Five LTC1391s 5V
0.1µF BYPASS CAPACITORS FROM V + TO GND FOR EACH LTC1391 1 2 3 ANALOG INPUTS
4 5 6 7 8 1 2 3
ANALOG INPUTS
4 5 6 7 8 1 2 3
ANALOG INPUTS
4 5 6 7 8 1 2 3
ANALOG INPUTS
4 5 6 7 8 1 2 3
ANALOG INPUTS
4 5 6 7 8
S0
V+
S1
D
S2 S3 S4 S5 S6 S7
V+
S1
D
S3 S4 S5 S6 S7
V+
S1
D
S3 S4 S5 S6 S7
V+
S1
D
S3 S4 S5 S6 S7
S1
D
S4 S5 S6 S7
7 CLK LTC1286 3 6 –IN DOUT 4 5 GND CS
0.1µF
+IN
DATA OUT
16 15
16 15
16 15
V LTC1391 13 D D OUT 12 DIN 11 CS 10 CLK 9 GND V+
S3
8
– 14
S0
S2
2
VCC
14 V– LTC1391 13 DOUT C 12 DIN 11 CS 10 CLK 9 GND
S0
S2
15
VREF
14 V– LTC1391 13 DOUT B 12 DIN 11 CS 10 CLK 9 GND
S0
S2
1
14 V– LTC1391 13 DOUT A 12 DIN 11 CS 10 CLK 9 GND
S0
S2
16
16 15
14 V– LTC1391 13 DOUT E 12 DIN 11 CS 10 CLK 9 GND
DATA IN CS CLK
1391 TA04
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LTC1391 U
PACKAGE DESCRIPTIO
GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641)
0.189 – 0.196* (4.801 – 4.978) 16 15 14 13 12 11 10 9
0.229 – 0.244 (5.817 – 6.198)
0.150 – 0.157** (3.810 – 3.988)
1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0.007 – 0.0098 (0.178 – 0.249)
0.009 (0.229) REF
0.053 – 0.068 (1.351 – 1.727)
2 3
4
5 6
7
8 0.004 – 0.0098 (0.102 – 0.249)
0° – 8° TYP
0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.008 – 0.012 (0.203 – 0.305)
0.0250 (0.635) BSC
GN16 (SSOP) 1098
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LTC1391 U
PACKAGE DESCRIPTIO
N Package 16-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510)
0.770* (19.558) MAX 16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
0.255 ± 0.015* (6.477 ± 0.381)
0.130 ± 0.005 (3.302 ± 0.127)
0.300 – 0.325 (7.620 – 8.255)
0.009 – 0.015 (0.229 – 0.381)
(
+0.035 0.325 –0.015 8.255
+0.889 –0.381
)
0.045 – 0.065 (1.143 – 1.651)
0.020 (0.508) MIN
0.065 (1.651) TYP 0.125 (3.175) MIN
0.100 (2.54) BSC
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.018 ± 0.003 (0.457 ± 0.076)
N16 1098
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LTC1391 U
PACKAGE DESCRIPTIO
S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610)
0.386 – 0.394* (9.804 – 10.008) 16
15
14
13
12
11
10
9
0.150 – 0.157** (3.810 – 3.988)
0.228 – 0.244 (5.791 – 6.197)
1 0.010 – 0.020 × 45° (0.254 – 0.508)
2
3
4
5
6
0.053 – 0.069 (1.346 – 1.752)
0.008 – 0.010 (0.203 – 0.254)
0.014 – 0.019 (0.355 – 0.483) TYP
8
0.004 – 0.010 (0.101 – 0.254)
0° – 8° TYP
0.016 – 0.050 (0.406 – 1.270)
7
0.050 (1.270) BSC
S16 1098
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
sn1391 1391fas
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1391
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TYPICAL APPLICATIO
Interfacing LTC1391 with LTC1257 for Demultiplex Operation
1 2 3 ANALOG OUTPUTS
4 5 6 7 8
V+
S0 S1
D V
S3
DOUT
S4
DIN
S5
CS
S6
CLK
S7
TTL COMPATIBLE AT V + = 5V
GND
5V ≤ V + ≤ 12V
15
– 14
S2 LTC1391
16 0.1µF 47k
13 12
OPTIONAL D/A OUTPUT FILTER
11 10
1
9
2
DATA CLK CS
CLK
VCC
8
7 VOUT LTC1257 6 3 LOAD VREF 5 4 GND DOUT DIN
0.1µF
1391 TA03
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5V and 3V 12-Bit Voltage Output DAC 3V 12-Bit Voltage Output DAC
Multiplying VOUT DAC, SO-8 Package, Rail-to-Rail Output, Low Power Complete VOUT DAC, SO-8 Package, Daisy-Chainable, Low Power
LT1460-2.5 LT1461-2.5
Micropower, Precision Bandgap Reference Micropower, Low Dropout Reference
130µA Supply Current, 10ppm/°C, Available in SOT-23 50µA Supply Current, 300mV Dropout, 3ppm/°C Drift
LTC1655/LTC1655L 16-Bit, Voltage Output DAC, 5V/3V LTC1658 14-Bit, Voltage Output DAC
SO-8 Package, Micropower, Serial I/O Micropower, Multiplying VOUT, Swings from GND to VREF
MICROWIRE is a trademark of National Semiconductor.
sn1391 1391fas
12
Linear Technology Corporation
LT/TP 0701 1.5K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LINEAR TECHNOLOGY CORPORATION 1995
